VHDL BY EXAMPLE - Blaine Readler
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A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the VHLD hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all core features of VHDL are brought to li ... Pilns apraksts
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Aprašymas
A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the VHLD hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all core features of VHDL are brought to light. Included in the coverage are state machines, modular design, FPGA-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world FPGA solutions. All the sample code used in the book is available online. What Strunk and White did for the English language with "The Elements of Style," VHDL BY EXAMPLE does for FPGA design.
Vairāk informācijas
| Autors | Blaine Readler |
|---|---|
| Izdevējs | Full Arc Press |
| Izlaides gads | 2014 |
| Vāka tips | Mīkstais vāks |
| EAN | 9780983497356 |